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STN2NE10L N-channel 100V - 0.33 -2A - SOT-223 STripFETTM Power MOSFET General features Type STN2NE10L VDSS (@Tjmax) 100V RDS(on) <0.4 ID 1.8A 2 Exceptional dv/dt capability Avalanche rugged technology 100% avalanche tested Low threshold drive 1 SOT-223 2 3 Description This Power MOSFET is the latest development of STMicroelectronics unique "Single Feature SizeTM" strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. Internal schematic diagram Applications Switching application Order codes Part number STN2NE10L Marking N2NE10L Package SOT-223 Packaging Tape & reel February 2007 Rev 5 1/12 www.st.com 12 Contents STN2NE10L Contents 1 2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................ 6 3 4 5 Test circuit ................................................ 8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2/12 STN2NE10L Electrical ratings 1 Electrical ratings Table 1. Symbol VDS VGS ID ID IDM (1) Absolute maximum ratings Parameter Drain-source voltage (VGS = 0) Gate-source voltage Drain current (continuous) at TC = 25C Drain current (continuous) at TC=100C Drain current (pulsed) Total dissipation at TC = 25C Derating factor Value 100 20 1.8 1.3 7.2 2.5 0.02 6 150 -65 to 150 Unit V V A A A W W/C V/ns C PTOT dv/dt (2) TJ Tstg 2. Peak diode recovery voltage slope Operating junction temperature Storage temperature 1. Pulse width limited by safe operating area ISD 7.2 A, di/dt 200A/s, VDD (BR)DSS, TJ TJMAX V Table 2. Rthj-pcb Rthj-amb Tl Thermal data Thermal resistance junction-PC Board max Thermal resistance junction-ambient max Maximum lead temperature for soldering purpose 50 60 260 C/W C/W C Table 3. Symbol IAR EAS Avalanche characteristics Parameter Avalanche current, repetitive or not-repetitive (pulse width limited by Tj Max) Single pulse avalanche energy (starting Tj=25C, Id=Iar, Vdd=25V) Value 1.8 20 Unit A mJ 3/12 Electrical characteristics STN2NE10L 2 Electrical characteristics (TCASE=25C unless otherwise specified) Table 4. Symbol V(BR)DSS IDSS IGSS VGS(th) RDS(on) On/off states Parameter Drain-source breakdown voltage Zero gate voltage drain current (VGS = 0) Gate body leakage current (VDS = 0) Gate threshold voltage Static drain-source on resistance Test conditions ID = 250 A, VGS= 0 VDS = Max rating, VDS = Max rating @125C VGS = 20V VDS= VGS, ID = 250A VGS= 10V, ID= 1A VGS= 5V, ID= 1A 1 1.7 0.33 0.38 Min. 100 1 10 100 Typ. Max. Unit V A A nA V 3 0.4 0.45 Table 5. Symbol gfs (1) Ciss Coss Crss Qg Qgs Qgd Dynamic Parameter Forward transconductance Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate-source charge Gate-drain charge Test conditions VDS>ID(on) x RDS(on)max, ID=1A Min. 1 Typ. 3 345 45 20 10 5 4 14 Max. Unit S pF pF pF nC nC nC VDS =25V, f=1 MHz, VGS=0 VDD=80V, ID = 7A VGS =5V (see Figure 13) 1. Pulsed: pulse duration=300s, duty cycle 1.5% Table 6. Symbol td(on) tr td(off) tf tr(Voff) tf tc 4/12 Switching times Parameter Turn-on delay time rise time Test conditions VDD=50 V, ID=3.5A, RG=4.7, VGS=5V (see Figure 14) VDD=50 V, ID=3.5A, RG=4.7, VGS=5V (see Figure 14) VDD=80 V, ID=7A, RG=4.7, VGS=5V (see Figure 14) Min. Typ. 7 17 Max. Unit ns ns Turn-off-delay time fall time Off-voltage Rise Time Fall Time Cross-over Time 22 8 8 9 19 ns ns ns ns ns STN2NE10L Electrical characteristics Table 7. Symbol ISD ISDM (1) Source drain diode Parameter Source-drain current Source-drain current (pulsed) Forward on voltage Reverse recovery time Reverse recovery charge Reverse recovery current ISD=2A, VGS=0 ISD=7 A, di/dt = 100A/s, VDD=30 V, Tj=150C 75 190 5 Test conditions Min. Typ. Max 2 8 1.5 Unit A A V ns nC A VSD(2) trr Qrr IRRM 1. Pulse width limited by safe operating area. 2. Pulsed: pulse duration=300s, duty cycle 1.5% 5/12 Electrical characteristics STN2NE10L 2.1 Figure 1. Electrical characteristics (curves) Safe operating area Figure 2. Thermal impedance Figure 3. Output characteristics Figure 4. Transfer characteristics Figure 5. Transconductance Figure 6. Static drain-source on resistance 6/12 STN2NE10L Figure 7. Gate charge vs. gate-source voltage Figure 8. Electrical characteristics Capacitance variations Figure 9. Normalized gate threshold voltage vs. temperature Figure 10. Normalized on resistance vs. temperature Figure 11. Source-drain diode forward characteristics 7/12 Test circuit STN2NE10L 3 Test circuit Figure 13. Gate charge test circuit Figure 12. Switching times test circuit for resistive load Figure 14. Test circuit for inductive load Figure 15. Unclamped Inductive load test switching and diode recovery times circuit Figure 16. Unclamped inductive waveform Figure 17. Switching time waveform 8/12 STN2NE10L Package mechanical data 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 9/12 Package mechanical data STN2NE10L SOT-223 MECHANICAL DATA mm MIN. a b c d e1 e4 f g l1 l2 L 2.9 0.67 6.7 3.5 6.3 3 0.7 7 3.5 6.5 2.27 4.57 0.2 0.63 1.5 TYP. 2.3 4.6 0.4 0.65 1.6 MAX. 2.33 4.63 0.6 0.67 1.7 0.32 3.1 0.73 7.3 3.7 6.7 114.2 26.4 263.8 137.8 248 118.1 27.6 275.6 137.8 255.9 MIN. 89.4 179.9 7.9 24.8 59.1 mils TYP. 90.6 181.1 15.7 25.6 63 MAX. 91.7 182.3 23.6 26.4 66.9 12.6 122.1 28.7 287.4 145.7 263.8 DIM. L l2 e1 a b f d c e4 C l1 B C E g P008B 10/12 STN2NE10L Revision history 5 Revision history Table 8. Date 19-Oct-2005 05-March-2006 19-Sep-2006 01-Feb-2007 Revision history Revision 2 3 4 5 Preliminary datasheet Modified value on Table 4 New template, no content change Typo mistake on Table 1. Changes 11/12 STN2NE10L Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST'S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. 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